CXMT has achieved its strongest competitive position precisely where it is being forced to leave, funded by a state whose objectives — supply security, employment, and technology independence — do not require it to maximize returns for minority shareholders.
Business Model
CXMT is China's largest DRAM manufacturer and the world's fourth-largest DRAM producer by wafer capacity, having grown from a standing start in 2016 to commanding approximately 10% of global DRAM wafer output by 2025. Operating as an IDM, it manufactures wafers at its own 12-inch DRAM fabs,performs the majority of chip testing in-house, and outsources downstream module assembly.
Domestic market focus. The company primarily sells through agents to China's largest technology companies, including Alibaba, Tencent, Lenovo, and Xiaomi.
Direct sales gain traction in 1H25. The % were 12%, 15%, 14%, 27% in 2022, 2023, 2024 and 1H25 respectively.
Segment
DDR. DDR4 and DDR5 target servers and PCs, with DDR5 delayed mass production to late 2025.
LPDDR. The LPDDR series for smartphones and IoT devices accounted for 70% of 1H25 revenue, but it carries structurally thinner margins based on 2022-1H25 segment disclosure.
Currently minimal participation in the high ASP global segments: premium AI servers, HBM supply chains.
4Q25: First profitable quarter in company’s history based on guidance (though likely benefits from some one-off gains). 3Q25 revenue increased 150% YoY and achieved overall gross margin of 35%, significantly above the gross margin of 13% in 1H25 and 5.6% in 2024. Based on FY25 guidance, 4Q25 revenue will increase by 47% QoQ and will generate RMB 8B net profits, the first profitable quarter in the company’s history.
The DDR segment's margin expanded from -109% in 2023 to +19% in 1H25 (3Q25: Not disclosed) – a recovery explained primarily by the industry-wide DRAM upcycle — not a structural improvement in CXMT's competitive position.
LPDDR remains near breakeven despite being the volume engine of the business as of 1H25 (3Q25: Not disclosed). LPDDR revenue growth has historically been driven by quantity, while pricing has been under persistent pressure as CXMT competes on price to win sockets from entrenched Korean suppliers. DDR, by contrast, has seen revenue expand on both price and volume in the current upcycle. The depth of this cyclicality is illustrated by the company's unit ASP collapse: down 46% in 2023 and a further 55% in 2024.
Strategy
Closed-loop Chinese supply chain. CXMT's foundational strategic objective is to construct a vertically integrated, domestically self-sufficient memory supply chain that can survive external technology sanctions. Its closed-loop production ecosystem spans upstream materials and equipment localization all the way through to downstream module assembly partners.
State-owned enterprise status makes aggressive capacity expansion possible despite unfavorable cost structure - yield and Revenue-per-Wafer behind global peers. The company plans to invest another RMB 34.5B on future expansion, according to its prospectus.
Aggressive capacity expansion. CXMT expanded from 40K wafers per month in 2020 to 240K wafers per month by the end of 2025 with an expected 300K by 2026 and 400K by 2027. It currently captures approximately 10% of global DRAM wafer volume.
Revenue-per-wafer gap. Despite holding 10% of global capacity, CXMT earns only about 4% of global DRAM revenue likely due to producing lower-priced commodity products.
Process node limitations. Operating on a 16nm-class DUV process puts CXMT 18-24 months behind the Big 3, and DUV physics impose hard limits on sub-12nm efficiency.
Aggressively dumping older legacy chips with subsidy from government to capture market share at the low-end of the market, while pricing advanced chips much closer to standard market rates.
Subsidized market entry. CXMT entered the DDR4 market in May 2024 at prices approximately 50% below prevailing rates, forcing incumbents to accelerate their exit as margins collapsed.
Government pushed toward DDR5 in 1Q25 (though mass production delayed to late 2025) accidentally resulted in significant price spikes for DDR4. CXMT's 3Q25/4Q25 revenue surge was driven by selling its remaining DDR4 inventory and output at 2–3x higher prices — a windfall created largely by its own government-mandated pivot away from DDR4. The DDR5 revenue contribution in that period was likely negligible. CXMT accidentally engineered its own price tailwind.
HBM3 Ambitions targeting domestic AI. CXMT aims for HBM3 mass production by late 2026 an HBM3E samples by 2027 to serve Chinese AI chip designers like Huawei and Biren, who have been cut off from Big 3 HBM supply by US export controls. According to techpowerup, CXMT plans to dedicate 20% of capacity to HBM3 line in 2026.
Competitive Landscape
High barrier of entry resulted in market share concentrating in 3 players. Samsung, SK Hynix, and Micron have collectively held over 90% of global DRAM revenue for more than a decade as DRAM fabrication requires capital expenditure exceeding $10 billion per new fab, process node expertise that takes years to accumulate, and customer qualification cycles that create significant switching costs. These structural barriers have historically prevented new entrants from gaining meaningful share.
CXMT's emergence from 0% to ~10% of global wafer capacity between 2020 and 2025 was only possible due to sustained state subsidy rather than market economics, though those gains were concentrated entirely in the low-end, commodity-margin segments of the market.
Narrowing technology gap but may be approaching a floor.
In 2023, CXMT was approximately two full generations behind the leading edge. Today, it mass-produces DDR5 and LPDDR5X on a 16nm-class DUV process, while Samsung and SK Hynix operate on 1b/1c nodes (sub-12nm) using EUV lithography. The gap has narrowed to approximately 18–24 months on the process node timeline.
However, node proximity understates the structural disadvantage. EUV enables the Big 3 to achieve finer patterning precision, higher transistor density, lower leakage, and better yields at advanced nodes. DUV physics impose hard limits on what CXMT can achieve at sub-12nm geometries — and US export controls have effectively blocked CXMT's access to EUV tools. This means the technology gap, while narrowing in absolute terms, may be approaching a floor. CXMT may be structurally capped at "one generation behind" rather than achieving parity.
The structural DRAM deficit benefits mid-market buyers who are largely indifferent among the top four suppliers on performance grounds. Micron and SK Hynix have redirected ~30% of existing DRAM production lines toward HBM. The estimate increase in wafers directed to HBM from the top 3 players in 2026 relative to 2025 equals to ~100K wafers per month.
The Big 3 have minimal incentive to reinvest this diverted capacity back into non-HBM, HBM gross margins are materially higher, and restoring DDR capacity would require capital expenditure with lower returns. The DDR supply gap is therefore likely in the near-term.
Meaning, CXMT is likely to expand its China market share (3Q25: 40%) within the low to mid-tier market due to current low penetration rate.
China accounted for approximately 30% of global DRAM revenue (excluding HBM) in 2024. CXMT currently holds ~4% of global DRAM revenue share. Even if only half of China's domestic DRAM demand falls into the low-to-mid tier segments CXMT can credibly serve, that represents approximately 15% of the global DRAM market — more than three times CXMT's current revenue share. The localization runway is substantial, provided CXMT can continue to improve yields, qualify its DDR5 with more domestic OEMs, and maintain pricing discipline as it scales
Segment - DDR Market
CXMT pricing advantage is the most prominent in general server workload, gaming and workstation but has minimal impact at the top end of the market. CXMT DDR5, launched in late 2025, is roughly 7 to 10% cheaper than equivalent kits from the modules offered by the Big Three but lacks behind in power efficiency at scale – making it unsuitable for running massive in-memory databases, dense cloud virtualization, and real-time big data analytics.
CXMT's entrance fundamentally disrupted the DDR4 supply landscape — and then CXMT itself was ordered to leave it. When CXMT entered in May 2024 at prices 50% below market, it accelerated the Big Three's exit from a product line they were already deprioritizing in favor of higher-margin HBM, resulting in a supply vacuum in a product that cannot simply be replaced: DDR5 is not a drop-in substitute for DDR4. The incompatibility is physical and fundamental - meaning any migration demands a complete hardware redesign and full requalification, a process that takes 12–24 months in consumer markets and 3–7 years in automotive and industrial applications.
Segment - LPDDR Market
CXMT achieves ~10.6 Gbps versus the Big 3's 12.7 Gbps — though it is roughly half a generation behind at the performance frontier, it is sufficient for 90% of domestic consumer devices is the likely reason why it has a huge dominance in the mid-tier, cost-sensitive mobile segments. A mid-range smartphone running LPDDR5X does not meaningfully benefit from the incremental performance difference between CXMT's 10.6 Gbps and Samsung's 12.7 Gbps.
Recent data from late 2025 and early 2026 shows that CXMT's steady market share climb in LPDDR4X has officially established a "Big Four" landscape in the mobile DRAM sector alongside Samsung, SK Hynix, and Micron.
HBM Market
As HBM4 begins to dominate the premium AI training market (expected from 2027), HBM3E will naturally waterfall down to AI inference, edge AI servers, ADAS automotive applications, and high-end consumer GPUs — all of which require high bandwidth but not the absolute peak speeds of training workloads.
This creates a potential secondary market for HBM3-class memory that CXMT could realistically serve with its domestic Chinese customer base, even at inferior yields and slightly lower performance. Critically, the transition to HBM4 requires 2–3nm logic base dies, a node CXMT cannot access under current equipment restrictions. HBM4 mass production is therefore not on CXMT's near-term roadmap — making the company a structural participant in the HBM3/3E tier, not the frontier tier.
Value Proposition
Government subsidy makes its pricing attractive within price sensitive users who do not need the most advanced technology. Current DDR and LPDDR competitive position fits well with China’s mass market – where top tier performance is not needed. Chinese OEMs with mid-range devices and domestic PC/server vendors often care more about cost and availability than absolute top-end speeds. Good-enough DRAM from CXMT is commercially viable if the price is right.
This pricing advantage does not translate to higher-end users. Global PC majors like HP and Dell are only “reviewing” CXMT as an alternative supplier and remain cautious because of quality doubts, which shows that at the high end, reliability and proven performance still trump pure price – Looking at the 2024 DRAM Market shares, CXMT's market presence is concentrated in the segments that do not require cutting-edge technology.
The condition for CXMT to move upmarket — performance overshooting market demand — is structurally unlikely in AI memory for now, but historically precedented in consumer DRAM. Overshoot occurred with DDR3 in the mid-2010s — the product becomes a pure commodity and the performance premium collapses, forcing all suppliers toward price competition. For the AI training segment, there is no foreseeable point where HBM performance "overshoots" due to increasing parameters for winners to emerge. The business model risk is that this overshoot keeps moving upward, eventually reaching segments where CXMT's DUV ceiling prevents it from following.
Being a national strategic asset means Beijing's interests and minority shareholders' interests are structurally misaligned. CXMT is formally embedded in Beijing's "Made in China 2025" national strategy to build indigenous capability across the semiconductor value chain. To China, CXMT solves the problems of domestic DRAM supply security, full employment at its fabs, and technology independence. The equity investor is the residual claimant after the state has extracted what it needs — supply security, employment, and technology independence — none of which require CXMT to maximize free cash flow.
Financials
Historical financials in line with what would be expected from a heavily subsidized strategic asset in a commoditized market.
Massive capital intensity. While the company achieved net operating cash inflow since 2024, the investment in assets accounted for 10x and 5x of the net operating cash inflow in 2024 and 1H25 respectively. Since 2022, the company has invested RMB 174B in purchase and construction of assets with RMB1.9B net operating cash inflow.
High R&D burden. Between 2022 and 1H25, research and development averaged approximately 31% of the company's total revenue.
ROE Check. Due to standardized commodity pricing, poor yields, and massive capex requirements, the company structurally struggles to generate returns exceeding its cost of capital. Based on annualized 4Q25 figures (annualized net profit: RMB 35B) and 1H balance sheet, it generated 12% ROE but only with an inflated memory price (4Q25 market price of DRAM surging at least 200% YoY).
Revenue growth in 2025 was powered by two forces: (1) an industry-wide DRAM pricing upcycles, itself caused by the Big 3's HBM capacity diversion and CXMT's DDR4 supply withdrawal; and (2) market absorbing the extra capacity introduced in 2025. None of the drivers reflects a structural improvement in CXMT's competitive position. 3Q25 revenue grew 150% YoY and the company is guiding another 47% QoQ growth in 4Q25.
CXMT's prospectus data reveals the two-lever nature of its revenue model:
Volume. DDR series shipments grew at a 61% CAGR from 2022 to 2024; LPDDR grew at 77% CAGR over the same period.
Price. ASPs are highly volatile. The 2022H2–2023H1 DRAM downcycle caused a historically severe ASP collapse. Recovery began in 2024 as the industry normalized. In 1H25, LPDDR ASPs declined 17% YoY, while DDR ASPs maintained strong growth of 24% YoY.
Both segments likely benefited from both increase in volume and price in 2H25, resulting in the strong revenue growth.
Gross margin. 3Q25 gross margin improved to 35%, suggesting potential operating leverage as revenue scales over a largely fixed cost base.
Operating margin. Between 2022 and 1H25, R&D averaged 31% of revenue. This figure excludes capital expenditure on fab construction, equipment, and capacity expansion — which pushes total reinvestment as a percentage of operating cash flow well above 100%. As expansion continues and technology upgrades remain mandated by the government, depreciation charges and reinvestment rates are likely to remain elevated.
Balance sheet and debt load. CXMT's expansion has been funded by a combination of state equity injections, policy bank loans, and the pending IPO. As of 1H25, the liabilities-to-assets ratio stood at 58%, similar to 2022 level but is higher than its Western peers.
Inversion: Ways This Fails
The investment thesis depends on several conditions remaining stable simultaneously. Any one of the following would materially damage the thesis:
US export restrictions ease. If Washington lifts or softens restrictions on DRAM sales to Chinese customers, the Big 3 re-enter CXMT's core market with superior technology and established customer relationships.
Big 3 rotate capacity back to commodity DDR. If AI infrastructure investment decelerates and HBM demand softens, Samsung, SK Hynix, and Micron can rebalance capacity toward DDR5 within 6–12 months. While CXMT could lower the price, the strategy will be less effective at the high-end technology.
AI training concentrates further. If a handful of frontier models win the AI arms race and training spend consolidates, overall HBM demand growth slows — reducing the supply distortion that is the foundation of CXMT's opportunity.
DUV physics impose a hard ceiling that may fail to keep pace with rising performance demands from consumers and enterprises alike. If the technology gap between DUV and EUV becomes unbridgeable at sub-12nm nodes, CXMT is permanently locked into the low-end commodity tier — a market with the worst unit economics in the semiconductor industry
Technology S-curve displacement. This mirrors the historical transition from desktop to mobile storage, where the industry's hard-won progress on HDD capacity per dollar became irrelevant as laptops repositioned the key metric around form factor and power. Vendors optimizing for the old curve did not lose because they stopped improving — they lost because the curve itself was displaced.
My View
CXMT acts as a second-order beneficiary of the global AI infrastructure boom without directly participating in the premium tiers. Samsung, SK Hynix, and Micron have redirected 22%, 33% and 28% of their DRAM lines respectively to HBM and exited DDR4, creating a structural deficit in standard memory. CXMT benefits from the industry-wide DDR upcycle and captures market share from marginal users who only slightly prefer the top three suppliers on performance grounds.
In the mid-term, two simultaneous prisoner's dilemmas are playing out and paradoxically, both benefit its near-term positioning.
At the AI hyperscaler level: Every major AI lab is compelled to spend more on compute today, because falling behind on model capability relative to competitors is an existential risk. The rational individual choice — spend heavily on AI training — is the collectively irrational outcome: all players spend heavily, locking up premium DRAM capacity, bidding up HBM prices, and leaving the commodity DDR market undersupplied.
At the Big 3 level: No single player among Samsung, SK Hynix, or Micron can unilaterally reduce HBM capacity to rebalance DDR supply without ceding high-margin AI memory revenue to the other two. So, all three maintain or increase HBM capacity even as commodity DDR prices spike — a classic oligopoly coordination failure that benefits the marginal entrant. The DDR supply gap is not a short-term aberration; it is a structurally self-reinforcing dynamic for as long as AI capex remains elevated
The whole memory market is structurally organized around a continuous innovation treadmill, which creates a structural "filtering" dynamic in the memory market. The top tier continuously migrates upward while the prior generation waterfalls down into commoditized mid-tier supply. The tipping point where performance improvement permanently overshoots the demand of the mass market would fundamentally change this dynamic.
If the majority of end-use cases (consumer devices, general cloud servers, mid-range smartphones) reach a point where the next generation of DRAM delivers no perceivable benefit, the margin premium at the frontier collapses and the entire market commoditizes. CXMT would be well-positioned in that AI world.
CXMT does not possess a durable competitive advantage in the Buffett sense within DDR5 but is protected by regulatory shelter — no pricing power, no switching costs, no proprietary technology that competitors cannot replicate over time. Its lower pricing to out-compete peers for DRAM were not due to superior cost structure (in fact it has diseconomies of scale) but due to support from the government. CXMT's share so far is concentrated in PC, consumer, and mobile segments — precisely the cost-sensitive, "good-enough" use cases where buyers’ priorities price and availability over absolute performance. Its share in the Data Center and Graphics/AI segments — the highest-ASP categories — remains negligible.
In China’s HBM market, CXMT is essentially a monopolist under regulatory shelter - a combination of Chinese state-mandated localization driving captive domestic demand, and US export restrictions that structurally exclude the Big 3 from serving Chinese AI customers. These two forces create a structurally protected market position that CXMT can dominate. If it successfully launches HBM3, it could charge a premium that improves its margin meaningfully as AI players in China will pay for it.
But whether it can successfully launch HBM3 is still uncertain. HBM3 is a significantly more complex manufacturing challenge than standard DRAM: it requires precision TSV (Through Silicon Via) stacking, where a single die failure can render an entire multi-die stack unsellable. The yield penalty compounds with each additional layer.
Looking ahead, the path to HBM4 is structurally blocked by lithography constraints. The 2–3nm logic base dies required are inaccessible under US equipment export controls.
That being said, government production is a double-edged sword. It guarantees survival but limits the capital allocation and likely results in allocation to activities that benefit the country but do no necessarily benefit shareholders. This is a company that must keep pouring capital into a competition it may never win.
CXMT has achieved its strongest competitive position precisely where it is now being forced to exit. In DDR4, the combination of government subsidies enabling below-cost pricing and the Big Three's voluntary withdrawal has engineered a monopoly in a commoditized legacy market — the ideal economics for a state-backed entrant. CXMT can price aggressively, faces no meaningful competition, and benefits from a captive domestic customer base that cannot quickly migrate to DDR5. In a free market, the rational response would be to exploit this monopoly position for as long as the DDR4 installed base demands it — harvesting cash from a product where all R&D costs are fully sunk, and incremental margins are maximized.
Instead, Beijing's industrial policy mandate forces CXMT to abandon its strongest market position and compete in DDR5 — a market where product differentiation is significant, and technology gaps are real. The policy logic is clear: China needs a viable DDR5 producer, not DDR4 cash cow. But the investment logic is the opposite: CXMT is being ordered to give up the market it dominates and fight for share in the market where it is weakest. This is the starkest illustration yet of why the state's objectives and minority shareholders' objectives are structurally misaligned.